DDR Memory Design and Test – A Better Way
Agilent offers the complete solutions for all areas of DDR design, meeting your needs for electrical physical layer, protocol layer, and functional test.
手册 2012-12-19
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 PDF 5.17 MB
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DDR Memory Design and Test Overview
Brief overview of Agilent solutions for DDR design and test.
手册 2012-12-19
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 PDF 1.14 MB
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E2688A 串行数据分析和时钟恢复软件
Agilent E2688A串行数据分析软件为工程师提供验证串行接口设计信号完整性的便捷方法。
产品资料 2012-06-28
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 PDF 733 KB
语言
- English | 2013-01-15 | PDF 6.07 MB
- 中文(简体) | 2012-06-28 | PDF 733 KB
- 日本語 | 2005-07-01 | PDF 728 KB
- 中文(繁體) | 2004-10-04 | PDF 855 KB
- 한국어 | 2003-10-03 | PDF 988 KB
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U7231A DDR3 Compliance Test Application for Infiniium Series Oscilloscopes
The Agilent Technologies U7231A DDR3 compliance test application provides a fast and easy way to test, debug and characterize your DDR3 designs.
产品资料 2011-12-13
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 PDF 1.23 MB
语言
- English | 2011-12-13 | PDF 1.23 MB
- 日本語 | 2008-06-27 | PDF 8.54 MB
- 中文(繁體) | 2009-09-01 | PDF 1.34 MB
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U7231A DDR3 Compliance Test Application Testing Notes
Describes the tests that are performed by the DDR3 Compliance Test Application in more detail.
用户手册 2011-03-01
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 PDF 6.01 MB
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Agilent W2630 系列 DDR2 DRAM BGA 探头安装指南
Agilent W2630 系列 DDR2 DRAM BGA 探头安装指南
产品资料 2009-10-08
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 PDF 971 KB
语言
- English | 2009-10-08 | PDF 971 KB
- 中文(简体) | 2009-10-08 | PDF 971 KB
- 日本語 | 2009-06-23 | PDF 1.69 MB
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U7231A DDR3 Compliance Test Application Online Help
This is a zipped Microsoft Windows® format help file. Extract this file to a Local Disk (a Windows security requirement); on Windows XP, you may have to open the file's Properties dialog and Unblock the file before opening.
帮助文件 2009-07-01
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 ZIP 2.40 MB
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Eye-Diagram Analysis Speeds DDR SDRAM Validation
文章 2009-01-06
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Validating the Physical and Protocol Layers in DDR Memory Interfaces
文章 2009-01-06
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适用于 Infiniium 90000 和 8000 系列示波器的 Agilent InfiniiScan 事件识别软件
InfiniiScan 软件能让您用示波器识别电子设计的信号完整性问题
产品资料 2008-10-20
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 PDF 783 KB
语言
- English | 2009-12-12 | PDF 1017 KB
- 中文(简体) | 2008-10-20 | PDF 783 KB
- 日本語 | 2009-07-07 | PDF 2.42 MB
- 한국어 | 2006-02-07 | PDF 823 KB
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A Time-Saving Method for Analyzing Signal Integrity in DDR Memory Buses
This application note covers new tools and measurement techniques for characterizing and validating signal integrity of DDR (double data rate synchronous dynamic random access memory) signals.
应用说明 2008-09-10
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 PDF 792 KB
语言
- English | 2008-09-10 | PDF 792 KB
- 日本語 | 2007-07-24 | PDF 4.08 MB
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Simplify DDR Validation with SI Methods
文章 2008-01-06
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DDR 1, 2 and 3 solutions Video
Includes probing methods, read/write separation technique and automated JEDEC compliance measurements with Infiniium Series oscilloscopes.
基本演示 2007-12-27
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 WMF 52.75 KB
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Infiniium 80000B Series Oscilloscopes and InfiniiMax Series Probes
Infiniium 80000B Series scopes and InfiniiMax probing system include the industry’s lowest noise floor, lowest jitter measurement floor, lowest trigger jitter and flattest
产品资料 2007-12-06
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 PDF 1.25 MB
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改善查看周期:调试DDR和DD2系统中的间歇
应用说明 2006-05-01
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 PDF 5.93 MB
语言
- English | 2006-04-14 | PDF 120 KB
- 中文(简体) | 2006-05-01 | PDF 5.93 MB
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Designing and Validating High-Speed Memory Buses (AN 1382-2)
DDR SDRAM (double data rate synchronous dynamic random access memory) is quickly becoming an accepted technology in the PC (personal computer) industry. Its low cost, high performance, and increasingly wide availability make it very desirable for PC memory buses and embedded designs such as high...
应用说明 2001-12-20
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 PDF 1.51 MB
语言
- English | 2001-12-20 | PDF 1.51 MB
- 日本語 | 2002-04-04 | PDF 633 KB
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